1. Field of the Invention
The present invention relates to a digital signal detection circuit used to decode an input signal whose waveform has been interfered or disturbed. The detection circuit uses a Viterbi decoding technique.
2. Prior Art
It is known for years that an optical disk system which regenerates binary data having been recorded in an optical disk includes a digital signal detection circuit employing Viterbi decoding techniques to regenerate a signal for the purpose of decreasing a data error rate of high-density recorded data.
FIG. 11 is a block diagram of this digital signal detection circuit. In the digital signal detection circuit of FIG. 11, digital data, which have been converted from 8-bit form to 10-bit form (according to a technique to convert the data from 8-bit form to 10-bit form in order to allow a frequency characteristic of the data to be DC component free) and recorded in an optical disk 101, are read by a light pickup head 102 driven by a laser driving circuit 103 to regenerate an analog signal. The regenerated analog signal is applied to a RF amplifier 104 to be amplified, then passed through an HPF 105 in order to cut out DC offset components from an output of the RF amplifier 104. An output signal of the HPF 105 is passed through an AGC circuit 106 to have a constant amplitude. An analog output signal of the AGC circuit 106 is converted into a digital signal by an A/D converter 107. A waveform of an output signal from the A/D converter 107 is shaped by a digital equalizer 108. A Viterbi decoder 109 decodes an output the digital equalizer 108 in Viterbi decoding technique to detect binary data. An 8 to 10-bit inversely converting circuit inversely converts output data of the Viterbi decoder 109 from 10-bit form into 8-bit form and outputs converted data. A signal amplified by the RF amplifier 104 is also applied to a PLL 111. The PLL 111 synchronizes a phase of the inputted signal and outputs it as a sampling clock signal in bit cycles to the A/D converter 107. The A/D converter 107 converts an output signal from the AGC circuit from analog to digital at a timing of the sampling clock supplied from the PLL 111.
It is supposed that an ideal single regenerated waveform obtained by reading out an analog regenerated waveform from the optical disk by the light pickup head 102 has a level value a1 at sampling points of t.sub.0 and t.sub.1 in bit cycles and a level value a.sub.0 (i.e., an optical offset component) at all sample points except for the sampling points t0,t1, as shown in FIG. 7. Accordingly, a range influenced by waveform interference is for two sampling points. If continuous data are recorded, a resulting waveform is a super position of the above ideal single regenerated waveforms, each of which is offset at every sampling point from a preceding one. The regenerated waveform of the continuous data has, as shown in FIG. 8, three level values a.sub.0, a.sub.1 and a.sub.2 at every sampling point (provided a.sub.2 =2a.sub.1 -a.sub.0). When the HPF 105 gets rid of the DC offset components from the waveform obtained by the addition besides the AGC circuit 106 causes the regenerated signal to have an amplitude of .+-.1, a resulting waveform is shown in FIG. 9. In this case, level values of the sampling points are -1, 0 and 1. A relation between the recorded data and level values (assumptive sampled values) of the waveform is represented by a trellis diagram, as shown in FIG. 10.
Viterbi decoder 109 performs a Viterbi decoding operation with three waveform values -1, 0 and 1 as the assumptive sampled values. The recorded data have been modulated (a conversion from 8-bit form to 10-bit form) to be free from DC components, since if the recorded data contain the DC components, information of the data will be cut out by the HPF.
The Viterbi decoding operation is to calculate an Euclidean distance between an assumptive sampled value and an actual value of each path at a sampling point according to the trellis diagram shown in FIG. 10, add sum totals of the Euclidean distances for an input waveform up to one clock before corresponding thereto to determine a sum total of each path, and select one having a smaller sum total of the Euclidean distances between two paths inputted to each state to hold it as a surviving path. At this time, there exists one path in each state. A path having a smaller sum total of the Euclidean distances between the two survivor paths is selected as the maximum likelihood path so that a path is decided by tracing back a train of such selected paths up to a predetermined number of samples (12 samples before in this case) to obtain decoded data from the path. A sum total of the Eucliden distances of the surviving paths calculated here is next used to calculate a sum total of Euclidean distances at the next sampling point. Repetition of the above operation at every sampling point permits demodulation of the data. The decoded data DT are thus outputted, delayed a predetermined number of samples.
A threshold value S5 required for the Viterbi decoder 109 is a constant used to calculate an Euclidean distance between an assumptive sampled value and an actual sampled value. A calculation of an Euclidean distance between an assumptive sampled value and an actual sampled value is carried out in the following fashion. Here, assumed that an actual sampled value is y.sub.i, an assumptive sampled value are three values, -1, 0 and 1. When the assumptive sampled value is -1, a square of an error r.sub.0i is given by a formula: ##EQU1## When the assumptive sampled value is 0, a square of an error r.sub.1i is given by a formula: ##EQU2## And, when the assumptive sampled value is 1, a square of an error is given by a formula: ##EQU3## In order to simplify Calculation of the above formulae (1), (2) and (3), y.sub.i.sup.2 is subtracted from each formula and each resulting formula is divided with 2 to be regularized. As a result, formula (1) becomes: EQU r'.sub.0i =y.sub.i -+0.5 (4)
Formula (2) becomes: EQU r'.sub.1i =0 (5)
And formula (3) becomes: EQU r'.sub.2i =-y.sub.i +0.5 (6)
The above three formulae (4), (5) and (6) are used to calculate an Euclidean distance. Therefore, a constant 0.5 necessary for each of the formulae (4), (5) and (6) is a threshold value S5.
The conventional digital signal detector however has a certain disadvantage. In order to give a constant amplitude to a regenerated analog signal in the AGC circuit 106, it is necessary to provide the HPF 105 to get rid of DC components from the regenerated analog signal so as to prevent an automatic gain control from carrying out with an offset signal (i.e., optical offset, electrical offset, etc.) of the regenerated analog signal. If data recorded in the disk contain DC components, data information is eliminated by the HPF 105. As a result, accurate signal detection becomes impossible. In the above conventional system, data are previously converted from 8-bit form to 10-bit form to prevent the data recorded in the disk from containing any DC component. The conventional digital signal detecting circuit therefore needs to include the 8-to-10 bit inverse-converter 110 therein. Since the 8-to-10 bit inverse-converter 110 converts 8-bit data into 10-bit data, the original data are added t for two redundant bits, causing a lower recording density of the disk.
An object of this invention is to overcome the above disadvantage by providing a digital signal detecting circuit being capable of detecting a digital signal without requiring an 8-to-10 bit inverse-conversion of the signal to eliminate DC components from data having been recorded in a disk.